M3882 datasheet(13/62 Pages) RENESAS

13 / 62 page

Rev.1.01

Nov 14, 2005

page 13 of 60

REJ03B0089-0101

3882 Group

Name

Input/Output

I/O Structure

Non-Port Function

Ref.No.

Table 6 I/O port function (1)

Related SFRs

I/O PORTS

All I/O pins are programmable as input or output. All I/O ports

have direction registers which specify the data direction of each

pin like input/output. One bit in a direction register corresponds to

one pin. Each pin can be set to be input or output port.

Writing “0” to the bit corresponding to the pin, that pin becomes an

input mode. Writing “1” to the bit, that pin becomes an output

mode.

When the data is read from the bit of the port register correspond-

ing to the pin which is set to output, the value shows the port latch

data, not the input level of the pin. When a pin set to input, the pin

comes floating. In input port mode, writing the port register

changes only the data of the port latch and the pin remains high

impedance state.

When the P8 function selection bit of the port control register 2 is

set to “1”, reading from address 001016 reads the port P4 register,

and reading from address 001116 reads the port P7 register.

Especially, the input level of P42 to P46 pins and P70 to P75 pins

can be read regardless of the data of the direction registers in this

case.

P00-P07

P10-P17

P20-P27

Port P0

Port P1

CMOS compatible

input level

CMOS 3-state output

or N-channel open-

drain output

Port control register 1

(1)

(2)

P30-P37

P40

P41

Port P2

CMOS compatible

input level

CMOS 3-state output

Port control register 1

Key-on wake up input

P42/INT0

P43/INT1

Port P3

P44

P45

P46

Input/output,

individual bits

Interrupt edge selection

Port control register 2

External interrupt input

P47/CLKRUN

Port P4

CMOS compatible

input level

CMOS 3-state output

or N-channel open-

drain output

Serialized IRQ control

Serialized IRQ function

output

(3)

(4)

(6)

(7)

(5)

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