STCF03I_08 datasheet(23/33 Pages) STMICROELECTRONICS

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Description of internal registers

STCF03I

23/33

8.10

F_RUN

This bit is kept HIGH by the STCF03I during flash mode. By checking this bit, the µP can

verify if the flash mode is running or has been terminated by the time counter.

8.11

LED_F

This bit is set by the STCF03I when the voltage seen on the LED pin is VREF2 > 5.3 V during

a torch or flash operation. This condition can be caused by an open LED, indicating a LED

failure. The device automatically goes into Ready mode to avoid damage. Internal high

frequency filtering avoids false detections. This bit is reset by the STCF03I following a read

operation of the STAT_REG.

8.12

NTC_W

This bit is set HIGH by the STCF03I and the ATN pin is pulled down, when the voltage seen

on the pin Rx exceeds VREF4 = 0.56 V. This threshold corresponds to a warning temperature

value at the LED measured by the NTC. The device is still operating, but a warning is sent to

the µP. This bit is reset by the STCF03I following a read operation of the STAT_REG.

8.13

NTC_H

This bit is set HIGH by the STCF03I and the ATN pin is pulled down, when the voltage seen

on the pin Rx exceeds VREF5. This threshold (1.2 V) corresponds to an excess temperature

value at the LED measured by the NTC. The device is put in ready mode to avoid damaging

the LED. This bit is reset by the STCF03I following a read operation of the STAT_REG.

8.14

OT_F

This bit is set HIGH by the STCF03I and the ATN pin is pulled down, when the chip over-

temperature protection (~140°C) has put the device in ready mode. This bit is reset by the

STCF03I following a read operation of the STAT_REG.

Table 15.

Status register

STAT_REG

(read mode)

MSB

LSB

SUB ADD=03

N/A

F_RUN

LED_F

NTC_W

NTC_H

OT_F

N/A

VOUTOK_N

Power ON,

SHUTDOWN MODE

RESET Value

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