TDA7505

Electrical specifications

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4.3.4

General interface electrical characteristics

4.3.5

High voltage CMOS interface DC electrical characteristics

4.3.6

DSP core

Table 8.

General interface electrical characteristics

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Low level input current without pull-up

device

(1)

1

μA

High level input current without pull-up

device

(1)

1

μA

Tri-state output leakage without pull

up/down device

(1)

1

μA

5V tolerant tri-state output leakage

without pull up/down device

(1)

1

μA

1

7

μA

I/O latch-up current

200

mA

Electrostatic protection

Leakage, 1

2000

V

1.

The leakage currents are generally very small, <1nA. The value given here, 1 A, is a maximum that can occur after an

electrostatic stress on the pin.

2.

Human Body Model.

Table 9.

High voltage CMOS interface DC electrical characteristics

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Low Level Input Voltage

V

High Level Input Voltage

V

Schmitt trigger hysteresis

0.8

V

Low level output Voltage

V

High level output Voltage

V

1.

Takes into account 200mV voltage drop in both supply lines.

2.

X is the source/sink current under worst-case conditions and is depicted for every I/O or output pin in the pin description.

Table 10.

DSP core

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

DSP clock frequency

75

MHz

Reset signal low state duration

1

µs