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CybraTech (2000) Ltd.
SOC-3000/i Scale-On-Chip
ASIC
Technical Specification
Revision B
Page 13
July, 2002
PIN
NAME
DESCRIPTION
2
nd
FUNCTION
DESCRIPTION
PULL-UP
RESISTOR
34
SEG E2
OUT 8.1
35
SEG F2
OUT 8.2
36
SEG G2
OUT 8.3
37
SEG DP2
OUT 9.0
38
SEG A3
OUT 9.1
39
SEG B3
OUT 9.2
Output, I/O See
“I/O Operation”,
page 69
40
SEG C3
41
SEG D3
42
SEG E3
43
SEG F3
44
SEG G3
45
SEG DP3
Display Segment Out,
see “LED Parallel Display Controller
Block Diagram”, page 45.
46
DIG 1
47
DIG 2
48
DIG 3
OUT 10.0
49
DIG 4
OUT 11.0
50
DIG 5
OUT 11.1
51
DIG 6
OUT 11.2
52
DIG 7
Display Digit Mux Control
See “LED Parallel Display Controller”,
page 45
OUT 11.3
I/O See “I/O
Operation”, page
69
53
OUT 12.0
54
OUT 12.1
55
OUT 12.2
56
OUT 12.3
57
OUT 12.4
Output
See “I/O Operation”, page 69
58
LED_SI_CLK
OUT 13.0
59
LED_SI_Data
OUT 13.1
60
LED_SI_ST
OUT 13.2
61
LED_SI_BL
LED Serial Interface Display Module
Clock, Data, Strobe and Blank
See “LED Serial Interface Display
Controller”, page 49.
OUT 13.3
I/O See “I/O
Operation”, page
69
62
VCC
Power Supply
63
RESET
Reset
50k
64
GND
Digital Ground
65
VDET/
INT0~
Power voltage detector input /
Interrupt 0 Input
66
SIG2+
2
nd ADC channel input signal +
67
SIG2–
2
nd ADC channel input signal –
68
AGND
Analog Ground
69
SEN–
Load cell sense input –
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