AT89C51CC03U-RDTIM datasheet(91/183 Pages) ATMEL

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AT89C51CC03

4182B–CAN–09/03

•

Enable General CAN IT in the interrupt system register,

•

Enable interrupt by message object, EICHi,

•

Enable interrupt on error, ENERCH.

To enable an interrupt on general error:

•

Enable General CAN IT in the interrupt system register,

•

Enable interrupt on error, ENERG.

To enable an interrupt on Buffer-full condition:

•

Enable General CAN IT in the interrupt system register,

•

Enable interrupt on Buffer full, ENBUF.

To enable an interrupt when Timer overruns:

•

Enable Overrun IT in the interrupt system register.

When an interrupt occurs, the corresponding message object bit is set in the SIT

To acknowledge an interrupt, the corresponding CANSTCH bits (RXOK, TXOK,...) or

CANGIT bits (OVRTIM, OVRBUF,...), must be cleared by the software application.

When the CAN node is in transmission and detects a Form Error in its frame, a bit Error

will also be raised. Consequently, two consecutive interrupts can occur, both due to the

same error.

When a message object error occurs and is set in CANSTCH register, no general error

are set in CANGIE register.

Bit Timing and Baud Rate

Figure 47. Sample And Transmission Point

The baud rate selection is made by Tbit calculation:

Tbit = Tsyns + Tprs + Tphs1 + Tphs2

Tsyns = Tscl = (BRP[5..0]+ 1)/Fcan = 1TQ.

Tprs = (1 to 8) * Tscl = (PRS[2..0]+ 1) * Tscl

Tphs1 = (1 to 8) * Tscl = (PHS1[2..0]+ 1) * Tscl

Tphs2 = (1 to 8) * Tscl = (PHS2[2..0]+ 1) * Tscl

Tsjw = (1 to 4) * Tscl = (SJW[1..0]+ 1) * Tscl

The total number of Tscl (Time Quanta) in a bit time must be comprised between 8 to

25.

FCAN

CLOCK

Prescaler BRP

PRS 3-bit length

PHS1 3-bit length

PHS2 3-bit length

SJW 2-bit length

Bit Timing

System clock Tscl

Time Quantum

Sample point

Transmission point

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