ADN4600

Rev. 0 | Page 10 of 10

Figure 15 to Figure 18 were obtained using the standard test circuit shown in Figure 14.

50Ω CABLES

2

2

TP3

HIGH SPEED

SAMPLING

OSCILLOSCOPE

50Ω CABLES

2

2

50Ω

ADN4600

AC-COUPLED

EVALUATION

BOARD

INPUT

PIN

OUTPUT

PIN

PATTERN

GENERATOR

DATA OUT

TP1

50Ω CABLES

2

2

TP2

FR4 TEST BACKPLANE

DIFFERENTIAL

STRIPLINE TRACES

8mils WIDE, 8mils SPACE,

8mils DIELECTRIC HEIGHT

TRACE LENGTHS = 30''

Figure 14. Output Pre-Emphasis Test Circuit, FR4

50ps/DIV

Figure 15. 3.25 Gbps Output Eye, 30 Inch FR4 Output Channel, PE = 0

(TP3 from Figure 14)

50ps/DIV

Figure 16. 4.25 Gbps Output Eye, 30 Inch FR4 Output Channel, PE = 0

(TP3 from Figure 14)

50ps/DIV

Figure 17. 3.25 Gbps Output Eye, 30 Inch FR4 Output Channel, PE = Best Setting

(TP3 from Figure 14)

50ps/DIV

Figure 18. 4.25 Gbps Output Eye, 30 Inch FR4 Output Channel, PE = Best Setting

(TP3 from Figure 14)