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ST92F120JR9T bảng dữ liệu(PDF) 304 Page - STMicroelectronics

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ST92F120 - ELECTRICAL CHARACTERISTICS
STANDARD TIMER TIMING TABLE
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, Push-pull output configuration,
unless otherwise specified)
Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,
standard timer prescaler and counter programmed values.
The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz, with minimum and
maximum prescaler value and minimum and maximum counter value.
Measurement points are VOH or VIH for positive pulses and VOL or VIL for negative pulses.
(1) Formula guaranteed by design.
(2) On this product STIN is not available as Alternate Function but it is internally connected to a precise clock source directly derived from OSCIN.
Refer to RCCU chapter for details about clock distribution.
Legend:
Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;
2 x OSCIN period when OSCIN is divided by 2;
OSCIN period x PLL factor when the PLL is enabled.
Psc = Standard Timer Prescaler Register content (STP): from 0 to 255
Cnt = Standard Timer Couter Registers content (STH,STL ): from 0 to 65535
TSTIN = Standard Timer Input signal period (STIN ).
STANDARD TIMER TIMING
N
°
Symbol
Parameter
Value
Unit
Formula (1)
Min
Max
1
TwSTOL
STOUT Low Pulse Width
4 x (Psc+1) x (Cnt+1) x Tck
167
2.8
ns
s
(Psc+1) x (Cnt+1) x TSTIN
with TSTIN ≥ 8x Tck
(2)
(2)
ns
2
TwSTOH
STOUT High Pulse Width
4 x (Psc+1) x (Cnt+1) x Tck
167
2.8
ns
s
(Psc+1) x (Cnt+1) x TSTIN
with TSTIN ≥ 8x Tck
(2)
(2)
ns
3
TwSTIL
STIN High Pulse Width
≥ 4 x Tck
(2)
(2)
ns
4
TwSTIH
STIN Low Pulse Width
≥ 4 x Tck
(2)
(2)
ns
1



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