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ST92F120JR9T bảng dữ liệu(PDF) 297 Page - STMicroelectronics

tên linh kiện ST92F120JR9T
Giải thích chi tiết về linh kiện  8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD
PDF  320 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST92F120JR9T bảng dữ liệu(HTML) 297 Page - STMicroelectronics

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ST92F120 - ELECTRICAL CHARACTERISTICS
EXTERNAL INTERRUPT TIMING TABLE
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note:
The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period.
The value in the right hand two columns shows the timing minimum and maximum for an internal clock at 24MHz (INTCLK) .
Measurement points are VIH for positive pulses and VIL for negative pulses.
(1) Formula guaranteed by design.
Legend:
Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;
2 x OSCIN period when OSCIN is divided by 2;
OSCIN period x PLL factor when the PLL is enabled.
EXTERNAL INTERRUPT TIMING
N
°
Symbol
Parameter
Value
Unit
Formula (1)
Min
1
TwINTLR
Low Level Minimum Pulse Width in Rising Edge
Mode
≥Tck+10
50
ns
2
TwINTHR
High Level Minimum Pulse Width in Rising Edge
Mode
≥Tck+10
50
ns
3
TwINTHF
High Level Minimum Pulse Width in Falling Edge
Mode
≥Tck+10
50
ns
4
TwINTLF
Low Level Minimum Pulse Width in Falling Edge
Mode
≥Tck+10
50
ns
1



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