ST7538P datasheet(3/30 Pages) STMICROELECTRONICS

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ST7538

Digital/Input

with internal pull-up

Watchdog input. The Internal Watchdog Counter is cleared on the

falling edges.

ZCOUT

Digital/Output

Zero Crossing Detection Output

ZCIN1

Analog/Input

Zero Crossing AC Input.

Floating

Must be connected to DVss.

DVss

Supply

Digital Ground

ATOP1

Power/Output

Power Line Driver Output

PAVss

Supply

Power Analog Ground

ATOP2

Power/Output

Power Line Driver Output

PAVCC

Supply

Power Supply Voltage

CL2

Analog/Input

Current Limiting Feedback.

A resistor between CL and AVss sets the PLI Current Limiting Value

ATO

Analog/Output

Small Signal Analog Transmit Output

SGND

Supply

Analog Signal Ground

XOUT

Analog I/O

Crystal Output- External Clock Input

XIN

Analog Input

Crystal Oscillator Input

AVdd

Supply

Analog Power supply.

Vsense3

Analog/Input

Output Voltage Sensing input for the voltage control loop

TEST2

Analog/Input

Test Input must be connected SGND

RxFO

Analog/Output

Receiving Filter Output

RAI

Analog/Input

Receiving Analog Input

VDC

Power

5V Voltage Regulator Output

floating

Must Be connected to DVss.

TEST1

Digital/Input

with internal pull-down

Test input. Must Be connected to DVss.

REGOK

Digital/Output

Security checksum logic output

"1" - Stored data Corrupted

"0" - Stored data OK

C_MINUS4 Analog/Input

Op-amp Inverting Input.

C_PLUS5

Analog/Input

Op-amp Not Inverting Input.

floating

Must Be connected to DVss

C_OUT

Analog/Output

Op-amp Output

GND

Supply

Substrate Ground (same function as PIN 6)

Digital/Output

Power Good logic Output

"1" - VDC is above 4.5V

"0" - VDC is below 4.25V

REG_DATA

Digital/Input

with internal pull-down

Mains or Control Register Access Selector

"1" - Control Register Access

"0" - Mains Access

floating

Must be connected to DVss.

<1>

If not used this pin must be connected to VDC

<2>

Cannot be left floating

<3>

Cannot be left floating

<4>

If not used this pin must be connected to VDC

<5>

If not used this pin must be tied low (SGND or PAVss or DVss)

PIN DESCRIPTION (continued)

N°

Name

Type

Description

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