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ST72C171 bảng dữ liệu(PDF) 72 Page - STMicroelectronics

tên linh kiện ST72C171
Giải thích chi tiết về linh kiện  8-BIT MCU with 8K FLASH, ADC, WDG, SPI, SCI, TIMERS SPGAs Software Programmable Gain Amplifiers, OP-AMP
PDF  152 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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PWM AUTO-RELOAD TIMER (Cont’d)
Output compare and Time base interrupt
On overflow, the OVF flag of the CSR register is
set and an overflow interrupt request is generated
if the overflow interrupt enable bit, OIE, in the CSR
register, is set. The OVF flag must be reset by the
user software. This interrupt can be used as a time
base in the application.
External clock and event detector mode
Using the fEXT external prescaler input clock, the
auto-reload timer can be used as an external clock
event detector. In this mode, the ARR register is
used to select the nEVENT number of events to be
counted before setting the OVF flag.
nEVENT = 256 - ARR
When entering HALT mode while fEXT is selected,
all the timer control registers are frozen but the
counter continues to increment. If the OIE bit is
set, the next overflow of the counter will generate
an interrupt which wakes up the MCU.
Figure 45. External Event Detector Example (3 counts)
COUNTER
t
FDh
FEh
FFh
FDh
OVF
CSR READ
INTERRUPT
ARR=FDh
fEXT=fCOUNTER
FEh
FFh
FDh
IF OIE=1
INTERRUPT
IF OIE=1
CSR READ



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