ST62T52B datasheet(21/68 Pages) STMICROELECTRONICS

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ST62T52B ST62T62B/E62B

3.3 DIGITAL WATCHDOG

The digital Watchdog consists of a reloadable

downcounter timer which can be used to provide

controlled recovery from software upsets.

The Watchdog circuit generates a Reset when the

downcounter reaches zero. User software can

prevent this reset by reloading the counter, and

should therefore be written so that the counter is

regularly reloaded while the user program runs

correctly. In the event of a software mishap (usu-

ally caused by externally generated interference),

the user program will no longer behave in its usual

fashion and the timer register will thus not be re-

loaded periodically. Consequently the timer will

decrement down to 00h and reset the MCU. In or-

der to maximise the effectiveness of the Watch-

dog function, user software must be written with

this concept in mind.

Watchdog behaviour is governed by two options,

known

“WATCHDOG

ACTIVATION”

(i.e.

HARDWARE or SOFTWARE) and “EXTERNAL

STOP MODE CONTROL” (see Table 7 Recom-

mended Option Choices).

In the SOFTWARE option, the Watchdog is disa-

bled until bit C of the DWDR register has been set.

When the Watchdog is disabled, low power Stop

mode is available. Once activated, the Watchdog

cannot be disabled, except by resetting the MCU.

In the HARDWARE option, the Watchdog is per-

manently enabled. Since the oscillator will run

continuously, low power mode is not available.

The STOP instruction is interpreted as a WAIT in-

struction, and the Watchdog continues to count-

down.

However, when the EXTERNAL STOP MODE

CONTROL option has been selected low power

consumption may be achieved in Stop Mode.

Execution of the STOP instruction is then gov-

erned by a secondary function associated with the

NMI pin. If a STOP instruction is encountered

when the NMI pin is low, it is interpreted as WAIT,

as described above. If, however, the STOP in-

struction is encountered when the NMI pin is high,

the Watchdog counter is frozen and the CPU en-

ters STOP mode.

When the MCU exits STOP mode (i.e. when an in-

terrupt is generated), the Watchdog resumes its

activity.

Table 7. Recommended Option Choices

Functions Required

Recommended Options

Stop Mode & Watchdog

“EXTERNAL STOP MODE” & “HARDWARE WATCHDOG”

Stop Mode

“SOFTWARE WATCHDOG”

Watchdog

“HARDWARE WATCHDOG”

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