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L9805E bảng dữ liệu(PDF) 35 Page - STMicroelectronics |
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L9805E bảng dữ liệu(HTML) 35 Page - STMicroelectronics |
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35 / 127 page ![]() L9805E On-Chip Peripherals 35/127 In case of a floating input with interrupt configuration, special care must be taken when changing the configuration (see Figure 17). The external interrupts are hardware interrupts, which means that the request latch (not accessible directly by the application) is automatically cleared when the corresponding interrupt vector is fetched. To clear an unwanted pending interrupt by software, the sensitivity bits in the Miscellaneous register must be modified. Output Mode The output configuration is selected by setting the corresponding DDR register bit. In this case, writing the DR register applies this digital value to the I/O pin through the latch. Then reading the DR register returns the previously stored value. Two different output modes can be selected by software through the OR register: Output push-pull and open-drain. DR register value and output pin status: Alternate function When an on-chip peripheral is configured to use a pin, the alternate function is automatically selected. This alternate function takes priority over the standard I/O programming. When the signal is coming from an on-chip peripheral, the I/O pin is automatically configured in output mode (push-pull or open drain according to the peripheral). When the signal is going to an on-chip peripheral, the I/O pin must be configured in input mode. In this case, the pin state is also digitally readable by addressing the DR register. Note: Input pull-up configuration can cause unexpected value at the input of the alternate peripheral input. When an on-chip peripheral use a pin as input and output, this pin has to be configured in input floating mode. DR Push-Pull Open-drain 0 Vss Vss 1 VDD Floating |
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