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ST10F280 bảng dữ liệu(PDF) 64 Page - STMicroelectronics |
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ST10F280 bảng dữ liệu(HTML) 64 Page - STMicroelectronics |
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64 / 186 page  ST10F280 64/186 11.2.1.3 - Burst Mode Burst mode is selected by setting bit PB01 in reg- ister XPWMCON1 to ‘1’. This mode combines the signals from XPWM channels 0 and 1 onto the port pin of channel 0. The output of channel 0 is replaced with the logical AND of channels 0 and 1. The output of channel 1 can still be used at its associated output pin (if enabled). Each of the two channels can either operate in mode 0 or 1. Note: It is guaranteed by design, that no spurious spikes will occur at the output pin of channel 0 in this mode. The output of the AND gate will be transferred to the output pin synchronously to internal clocks. XORing of the PWM signal and the port output latch value is done after the ANDing of channel 0 and 1. Figure 22 : Operation and Output Waveform in Burst Mode XPP0 Period Value XPT0 Count Value Channel 0 XPP1 XPT1 Channel 0 Channel 1 Resulting Output XPOUT0 |
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