NRF52811-QCAA-R datasheet(235/444 Pages) NORDIC

235 / 444 page

Peripherals

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

I I I I

G G G F E E E

C C C B

A A A A A A

Reset 0x00023282

0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 1 0

Access

Field

Value ID

Value

Description

250ns

0.25us

125ns

0.125us

RW AGCBACKOFFGAIN

Gain will be lowered by the specified number of gain steps

at the start of CTE

Note: First LNAGAIN gain drops, then MIXGAIN,

then AAFGAIN

6.14.15.80 DFECTRL2

Address offset: 0x914

Start offset for Direction finding

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

B B B B B B B B B B B B

A A A A A A A A A A A A A

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Access

Field

Value ID

Value

Description

RW TSWITCHOFFSET

Signed value offset after the end of the CRC before starting

switching in number of 16M cycles

RW TSAMPLEOFFSET

Signed value offset before starting sampling in number of

16M cycles relative to the beginning of the REFERENCE state

- 12 us after switching start

6.14.15.81 SWITCHPATTERN

Address offset: 0x928

GPIO patterns to be used for each antenna

Maximum 8 GPIOs can be controlled. To secure correct signal levels on the pins, the pins must be

configured in the GPIO peripheral as described in Pin configuration.

If, during switching, the total number of antenna slots is bigger than the number of written patterns, the

RADIO loops back to the pattern used after the reference pattern.

A minimum number of 3 patterns must be written.

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

A A A A A A A A

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Access

Field

Value ID

Value

Description

RW SWITCHPATTERN

Fill array of GPIO patterns for antenna control

The GPIO pattern array size is 40 entries.

When written, bit n corresponds to the GPIO configured in

PSEL.DFEGPIO[n].

When read, returns the number of GPIO patterns

written since the last time the array was cleared. Use

CLEARPATTERN to clear the array.

4454_140 v1.0

235

NRF52811-QCAA-R bảng dữ liệu(PDF) 235 Page - Nordic Semiconductor

NRF52811-QCAA-R bảng dữ liệu(HTML) 235 Page - Nordic Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL