ADMV4530 datasheet(48/64 Pages) AD

tên linh kiện	ADMV4530

Giải thích chi tiết về linh kiện	Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO

PDF	64 Pages

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nhà sản xuất	AD [Analog Devices]

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48 / 64 page

Data Sheet

ADMV4530

analog.com

Rev. C | 48 of 64

Table 28. Bit Descriptions for REG001A

Bits

Bit Name

Description

Reset

Recommended

Access

[7:6]

RESERVED

Reserved.

0x0

R/W

[5:0]

MOD2WORD[13:8]

14-Bit Modulus 2 Word. Sets the MOD2 value of N.

0x0

User defined

R/W

Address: 0x01B, Reset: 0x00, Name: REG001B

Table 29. Bit Descriptions for REG001B

Bits

Bit Name

Description

Reset

Recommended

Access

[7:0]

PHASE_WORD[7:0]

24 Bit Phase Word. Sigma-delta phase seed word. For best spur performance set the

value of PHASE_WORD = 8,388,617.

0x0

0x09

R/W

Address: 0x01C, Reset: 0x00, Name: REG001C

Table 30. Bit Descriptions for REG001C

Bits

Bit Name

Description

Reset

Recommended

Access

[7:0]

PHASE_WORD[15:8]

24 Bit Phase Word. Sigma-delta phase seed word. For best spur performance set

the value of PHASE_WORD = 8,388,617.

0x0

0x00

R/W

Address: 0x01D, Reset: 0x00, Name: REG001D

Table 31. Bit Descriptions for REG001D

Bits

Bit Name

Description

Reset

Recommended

Access

[7:0]

PHASE_WORD[23:16]

24 Bit Phase Word. Sigma-delta phase seed word. For best spur performance set

the value of PHASE_WORD = 8,388,617.

0x0

0x80

R/W

Address: 0x01E, Reset: 0x00, Name: REG001E

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