RZSLASHA1M datasheet(6/137 Pages) RENESAS

6 / 137 page

R01DS0479EJ0100 Rev.1.00

Page 6 of 137

Dec. 25, 2024

RZ/A1H Group, RZ/A1M Group

1. Overview

Video display controller 5

 Two channels

 Video input interface: One channel can be selected from the followings.

BT601, BT656 format (NTSC/PAL) input: Input clock: 27 MHz/54 MHz

Digital pin input (channel 0):

YCbCr422, YCbCr444, RGB888, RGB666, RGB565

Digital pin input size:

Maximum input video image size to be set*: 1440 pixels × 1024 lines (horizontal × vertical)

Note:*Depends on the AC characteristics of the connected device.

Examples of input video image size :

WXGA (1280 × 768)

XGA (1024 × 768)

SVGA (800 × 600),

WVGA (800 × 480),

VGA (640 × 480),

WQVGA (480 × 240),

QVGA (320 × 240, 240 × 320)

Composite video (CVBS) signal input decoded by the digital video decoder

 Input video control

Horizontal noise reduction (NR), brightness adjustment and contrast adjustment using matrix

operation

 Scaling control

Vertical and horizontal scaling up or down of input video possible at a desired ratio (scaling up of

graphics also possible)

Scaling up ratio: 1 to 8; scaling down ratio: 1/8 to 1

Interpolation: Hold or linear selectable

2D IP conversion: 2D IP conversion through separately setting the initial phases

for the top and bottom fields

 Video recording

Output pixel format: YCbCr444, YCbCr422, RGB888, RGB565

Output field rate: 1/1, 1/2, 1/4, 1/8

Rotation: Horizontal mirroring and 90/180/270 degree rotation for YCbCr422 and RGB565

Maximum video image size to be stored: ×1 size of input video image

 Output video control

Black stretch: Black area stretched according to Y signal state

Enhancer capability: LTI (transient improvement) and sharpness (contour emphasis) for Y signal

Items

Specification

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