AS1181 datasheet(41/92 Pages) AMSOSRAM

tên linh kiện	AS1181

Giải thích chi tiết về linh kiện	8-channel LED/VCSEL driver with enhanced safety features

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AS1181

Functional description

Datasheet • PUBLIC • Document Feedback

DS001139 • v3-00 • 2026-Apr-01

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7.3.2

Interrupt status & history

Reading the 3 “IRQ_STATUS” registers will automatically clear the corresponding interrupt

status bits.

Before clearing is done, the contents of “IRQ_STATUS” are copied into register

IRQ_HISTORY0 register (Address 0x1AAA), IRQ_HISTORY1 register (Address 0x1AAC) and

IRQ_HISTORY2 register (Address 0x1AAE) to backup the interrupt status.

The interrupt output signal IRQ_N will be de-asserted only after the 3 status registers have

been read.

The I3C CCC command 'ClearFaults' clears all status bits in IRQ_STATUS0 to IRQ_STATUS3

with one exception IRQ_STATUS[0] (bit 0, “fault”) will only be cleared with I3C CCC command

'Reset'.

Note: Only interrupt status bits of type 'pulse' (see Table 6, Table 7, Table 8) will be cleared

immediately. Interrupt status bits of interrupts with type 'level' will be cleared after interrupt

source has vanished.

AS1181 bảng dữ liệu(PDF) 41 Page - ams-OSRAM AG