AS1170 datasheet(48/53 Pages) AMSOSRAM

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AS1170

Application information

Datasheet

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DS001083

• v2-00 • 2024-Feb-05

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Part number

DCR

ISATURATION

Size

Manufacturer

MDMK2020T1R0M

1.0 µH > 0.6 µH @

2.75 A

56 m

Ω

2.55 A (6)

2.0x2.0x1.2 mm

height is max

MAKK2016T1R0M

1.0 µH > 0.6 µH @

2.75 A

65 m

Ω

2.0 A (7)

2.0x1.6x1.0 mm

height is max

(1) Do not exceed maximum ISATURATION - can be ensured by setting coil_peak (will limit LED current).

(2) Flash pattern: 200 ms / 3 A, 200 ms pause, 200 ms / 3 A, 2 s then repeat again (no limit on the number of total cycles)

Alternative pattern with 1000 ms / 1.6 A, 200 ms pause, 200 ms / 3 A, 200 ms pause, 200 ms / 3 A, 2 s then repeat again. (no

limit on the number of total cycles).

(3) Set current limit to 2 A (coil_peak=00b) - will limit maximum output current. Flash cycle limit: 150 ms on, 500 ms off; repeat

maximum 50 times.

(4) Set current limit to 2.5 A (coil_peak=01b) - will limit maximum output current.

(5) Set current limit to 3.0 A (coil_peak=10b) - can limit maximum output current.

(6) Set current limit to 2.5 A (coil_peak=01b) - will limit maximum output current.

(7) Set current limit to 2 A (coil_peak=00b) - will limit maximum output current.

If a different inductor is chosen, ensure similar DCR values and at least 0.6 µH inductance at

ILIMIT.

10.2

PCB layout guideline

The high speed operation requires proper layout for optimum performance. Route the power

traces first and try to minimize the area and wire length of the two high frequency/high current

loops:

Loop1: CVIN/CVIN2 - LDCDC - pin SW1/2 - pin GND - CVIN/CVIN2

Loop2: CVIN/CVIN2 - LDCDC - pin SW1/2 - pin VOUT1/2 - CVOUT - pin GND - CVIN/CVIN2

At the pin GND a single via (or more vias, which are closely combined) connects to the

common ground plane. This via(s) will isolate the DCDC high frequency currents from the

common ground (as most high frequency current will flow between Loop1 and Loop2 and will

not pass the ground plane.

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