AS3701 datasheet(12/110 Pages) AMSOSRAM

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ams Datasheet

Page 11

[v1-11] 2016-Dec-14

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AS3701 − Detailed Description – Power Management Functions

Mode Settings

To allow optimized performance in different applications, there

are bit settings possible, to get the best compromise between

high efficiency and low input/output ripple.

Figure 10:

DCDC Step-Down Converter Mode Settings

Low-Ripple, Low-Noise Operation

Low-ripple, low-noise operation can be enabled by setting the

bit sd_low_noise [SD_control1] to 1.

In this mode there is no minimum coil current necessary before

switching OFF the PMOS. As long as the load current is superior

to the ripple current, the device operates in continuous mode.

When the load current gets lower, the discontinuous mode is

triggered. Resultant the auto-zero comparator stops the NMOS

conduction to avoid load discharger and the duty cycle is

reduced down to tMIN_ON to keep the regulation loop stable.

This results in a very low ripple and noise, but decreased

efficiency at light loads, especially at low input to output

voltage differences.

Mode Setting: This graph shows the

difference of the efficiency curves for

high efficiency and low noise mode

setting. VSUP = 3.7V, VOUT = 2.5V,

fSW = 3MHz, TAMB = 25°C.

100

0.001

0.01

0.1

Output Current (A)

Vout = 2.5V, low noise

Vout = 2.5V

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