EM78F651NAPSSLASHNAPJ datasheet(16/58 Pages) EMC

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EM78F651N

8-Bit Microcontroller

•

Product Specification (V1.1) 10.20.2006

(This specification is subject to change without further notice)

6.1.13 RF (Interrupt Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LVDIF

EXIF

ICIF

TCIF

Note: “ 1 ” means with interrupt request

“ 0 ” means no interrupt occurs

Bit 7 (LVDIF): Low voltage Detector interrupt flag

When LVD1, LVD0 = “0, 0”, Vdd > 2.3V, LVDIF is “0”, Vdd

≤ 2.3V, set

LVDIF to “1”. LVDIF reset to “0” by software.

When LVD1, LVD0 = “0, 1”, Vdd > 3.3V, LVDIF is “0”, Vdd

≤ 3.3V, set

LVDIF to “1”. LVDIF reset to “0” by software.

When LVD1, LVD0 = “1, 0”, Vdd > 4.0V, LVDIF is “0”, Vdd

≤ 4.0V, set

LVDIF to “1”. LVDIF reset to “0” by software.

When LVD1, LVD0 = “1, 1”, Vdd > 4.5V, LVDIF is “0”, Vdd

≤ 4.5V, set

LVDIF to “1”. LVDIF reset to “0” by software.

Bits 6 ~ 3

Not used. Set all to”0”.

Bit 2 (EXIF) External interrupt flag. Set by a falling edge on /INT pin, reset by software.

Bit 1 (ICIF) Port 6 input status change interrupt flag. Set when Port 6 input changes,

reset by software.

Bit 0 (TCIF) TCC overflow interrupt flag. Set when TCC overflows, reset by software.

RF can be cleared by instruction but cannot be set.

IOCF is the interrupt mask register.

Note that the result of reading RF is the "logic AND" of RF and IOCF.

6.1.14 R10 ~ R3F

All of these are 8-bit general-purpose registers.

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