DIO1413CMP10 datasheet(8/39 Pages) DIOO

8 / 39 page

DIO1413/1414

Version 1.2, Sep 2024

www.dioo.com

Temperature resolution

0.0625

°C

Filter capacitor between DPx and DNx

CFILTER

Capacitive filter

Connected across external BJT

2.2

2.7

Conversion time

tCONV

Conversion time of

all channels

Default settings, DIO1413

130

Default settings, DIO1414

165

______

ALERT and

______

THERM/ADDR pins

VOL

Output low voltage

ISINK = 8 mA

0.4

ILEAK

Leakage current

______

ALERT and

______

THERM/ADDR pins device

powered or unpowered TA < 85°C

pull-up voltage ≤ 3.6 V

±5

µA

SMBus interface

VIH

Input high voltage

5 V tolerant

2.0

VIL

Input low voltage

5 V tolerant

0.8

ILEAK

Leakage current

Powered or unpowered, TA < 85°C

±5

µA

VHYS

Hysteresis

420

CIN

Input capacitance

IOL

Output low sink current

SMDATA = 0.4 V

8.2

SMBus timing (1) (2)

fsmb

Clock frequency

400

kHz

tSP

Spike suppression

tBUF

Bus free time stop to

start

1.3

µs

tHD:STA

Hold time: start

0.6

µs

tSU:STA

Setup time: start

0.6

µs

tSU:STO

Setup time: stop

0.6

µs

tHD:DAT

Data hold time

When transmitting to the master

µs

When receiving from the master

0.3

tSU:DAT

Data setup time

100

tLOW

Clock low period

1.3

µs

tHIGH

Clock high period

0.6

µs

tFALL

Clock/data fall time

Min. = 20 + 0.1CLOAD ns

300

tRISE (1)

Clock/data rise time

Min. = 20 + 0.1CLOAD ns

300

CLOAD

Capacitive load

Per bus line

400

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