4

Integrated

Circuit

Systems, Inc.

ICS9LPR426A

Advance Information

1346—10/23/07

Block Diagram

General Description

ICS9LPR426A is a low power CK410M-compliant clock specification. This clock synthesizer provides a single chip solution

for next generation P4 Intel processors and Intel chipsets. ICS9LPR426A is driven with a 14.318MHz crystal.

SDATA

SCLK

CPU_STOP#

FSLA

FSLB

FSLC

Vtt_Pwr_GD/PD#

PCI/PCIEX_STOP#

PEREQ#(2:1)

Fixed PLL

Frequency

Dividers

PLL

Array

Programmable

Frequency

Divider

Array

USB_48MHz

X1

X2

XTAL

Control

Logic

REF(1:0)

CPUCLKT (1:0)

CPUCLKC (1:0)

PCICLK (5:2)

PCIEXT (5:1)

PCIEXC (5:1)

PCICLK_F(1:0)

SATACLKT

SATACLKC

27FIX/LCD_SSCGT/PCIEX0T

27SS/LCD_SSCGC/PCIEX0C

ITP_EN

REQ_SEL

TEST_SEL

TEST_MODE

CPUCLKT2_ITP/PCIEXT6

CPUCLKC2_ITP/PCIEXC6

STOP

Logic

M and N programming range

Minimum

Maximum

Minimum

Maximum

NN

N

N

3

200

400

14

42

85

4

150

300

15

40

80

5

120

240

16

37

75

6

100

200

17

35

70

7

85

171

18

33

66

8

75

150

19

31

63

9

66

133

20

30

60

10

60

120

21

28

57

11

54

109

22

27

54

12

50

100

23

26

52

13

46

92

24

25

50

Yellow range is programming with more margin

MM