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AM6421 bảng dữ liệu(PDF) 61 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  AM64x Sitara™ Processors
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AM6421 bảng dữ liệu(HTML) 61 Page - Texas Instruments

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Table 5-8. DDRSS0 Signal Descriptions (continued)
SIGNAL NAME [1]
SIGNAL
TYPE [2]
DESCRIPTION [3]
ALV/ANI PIN [4]
DDR0_CKE1
O
DDRSS Clock Enable
F3
DDR0_CS0_n
O
DDRSS Chip Select 0
E3
DDR0_CS1_n
O
DDRSS Chip Select 1
E4
DDR0_DM0
IO
DDRSS Data Mask
B2
DDR0_DM1
IO
DDRSS Data Mask
M2
DDR0_DQ0
IO
DDRSS Data
A3
DDR0_DQ1
IO
DDRSS Data
A2
DDR0_DQ2
IO
DDRSS Data
B5
DDR0_DQ3
IO
DDRSS Data
A4
DDR0_DQ4
IO
DDRSS Data
B3
DDR0_DQ5
IO
DDRSS Data
C4
DDR0_DQ6
IO
DDRSS Data
C2
DDR0_DQ7
IO
DDRSS Data
B4
DDR0_DQ8
IO
DDRSS Data
N5
DDR0_DQ9
IO
DDRSS Data
L4
DDR0_DQ10
IO
DDRSS Data
L2
DDR0_DQ11
IO
DDRSS Data
M3
DDR0_DQ12
IO
DDRSS Data
N4
DDR0_DQ13
IO
DDRSS Data
N3
DDR0_DQ14
IO
DDRSS Data
M4
DDR0_DQ15
IO
DDRSS Data
N2
DDR0_DQS0
IO
DDRSS Data Strobe 0
C1
DDR0_DQS0_n
IO
DDRSS Complimentary Data Strobe 0
B1
DDR0_DQS1
IO
DDRSS Data Strobe 1
N1
DDR0_DQS1_n
IO
DDRSS Complimentary Data Strobe 1
M1
DDR0_ODT0
O
DDRSS On-Die Termination for Chip Select 0
E5
DDR0_ODT1
O
DDRSS On-Die Termination for Chip Select 1
F5
DDR0_RESET0_n
O
DDRSS Reset
D5
(1)
An external 240Ω ±1% resistor must be connected between this pin and VSS. The maximum power dissipation for the resistor is
5.2mW. No external voltage should be applied to this pin.
5.3.5 ECAP
5.3.5.1 MAIN Domain
Table 5-9. ECAP0 Signal Descriptions
SIGNAL NAME [1]
SIGNAL
TYPE [2]
DESCRIPTION [3]
ALV/ANI PIN [4]
ECAP0_IN_APWM_OUT
IO
Enhanced Capture (ECAP) Input or Auxiliary PWM
(APWM) Output
D18
Table 5-10. ECAP1 Signal Descriptions
SIGNAL NAME [1]
SIGNAL
TYPE [2]
DESCRIPTION [3]
ALV/ANI PIN [4]
ECAP1_IN_APWM_OUT
IO
Enhanced Capture (ECAP) Input or Auxiliary PWM
(APWM) Output
C17
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AM6442, AM6441, AM6422, AM6421, AM6412, AM6411
SPRSP56J – JANUARY 2021 – REVISED JUNE 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: AM6442 AM6441 AM6422 AM6421 AM6412 AM6411



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