APM32F103CBT6-R datasheet(36/78 Pages) GEEHY

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P a g e 35

5.5.2.2

Low-speed internal (LSICLK) RC oscillator

Table22 LSICLK Oscillator Characteristics (1)

Symbol

Parameter

Minimum

value

Typical

value

Maximum

value

Unit

fLSICLK

Frequency (VDD=2-3.6V, TA=-40~105

℃)

KHz

tSU(LSICLK)

Startup time of LSICLK oscillator, (VDD=3.3V，

TA=-40~105

℃)

μs

IDD(LSICLK)

Power consumption of LSICLK oscillator,

(VDD=3.3V，TA=-40~105

℃)

0.65

1.2

μA

Note: The data are obtained from a comprehensive evaluation and are not tested in production.

5.5.3

PLL Characteristics

Table23 PLL Characteristics

Symbol

Parameter

Value

Unit

Minimum

value

Typical

value

Maximum

(1)

fPLL_IN

PLL input clock (2)

MHz

PLL input clock duty cycle

fPLL_OUT

PLL frequency doubling output clock

(VDD = 3.3V，TA = -40~105

℃）

MHz

tLOCK

PLL phase locking time

105

μs

The data are obtained from a comprehensive evaluation and are not tested in production.

Note that appropriate multiplication factor shall be used so that the PLL input clock frequency is

consistent with the range determined by fPLL_OUT.

5.6

Power supply and power supply management

5.6.1

Test of Embedded Reset and Power Control Module Characteristics

Table24 Embedded Reset and Power Control Module Characteristics (TA=25℃) (-40℃~105℃) (1)

Symbol

Parameter

Condition

Minimum

value

Typical

value

Maximum

value

Unit

VPVD(3)

Programmable power

supply voltage

detector voltage level

selection

PLS[2:0]=000 (rising edge)

2.17

2.20

2.24

PLS[2:0]=000 (falling edge)

2.07

2.10

2.12

PLS[2:0]=001 (rising edge)

2.28

2.30

2.32

PLS[2:0]=001 (falling edge)

2.16

2.20

2.22

PLS[2:0]=010 (rising edge)

2.38

2.41

2.44

PLS[2:0]=010 (falling edge)

2.27

2.30

2.32

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