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TMF0020DRPR bảng dữ liệu(PDF) 7 Page - Texas Instruments |
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TMF0020DRPR bảng dữ liệu(HTML) 7 Page - Texas Instruments |
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7 / 40 page ![]() (8) Refers to the minimum time after which the recognition of negative edge is possible after VTH has been reached on the preceding rising edge. (9) Data retention time is degraded as TA increases. Long-term storage at elevated temperatures is not recommended. 5.7 Functional Tests Over operating free-air temperature range and VPUP = 3.3V and 5V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Multi- target bus Any TMF0020 must be able to communicate in a network where there are multiple target devices. An example configuration of 3 target devices (including the DUT) is shown in Figure 6-6.(1) 0 Multi-target bus Fails (1) See Test Procedures for Functional Tests. 5.8 Typical Characteristics Te mperature (°C) -10 0 10 20 30 40 50 60 70 80 1E-6 2E-6 3E-6 4E-6 5E-6 6E-6 7E-6 8E-6 VPUP = 3.3V VPUP = 5V Figure 5-1. Input Load Current (IL) vs Temperature (Standard Speed) Te mperature (°C) -10 0 10 20 30 40 50 60 70 80 1E-6 2E-6 3E-6 4E-6 5E-6 6E-6 7E-6 8E-6 VPUP = 5V Figure 5-2. Input Load Current (IL) vs Temperature (Overdrive Speed) www.ti.com TMF0020 SLVSJQ4 – MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TMF0020 |
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