TMS320VC549 datasheet(53/64 Pages) TI

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TMS320VC549

FIXEDPOINT DIGITAL SIGNAL PROCESSOR

SPRS078G − SEPTEMBER 1998 − REVISED OCTOBER 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

host port interface timing

switching

characteristics

over

recommended

operating

conditions

0.5tc(CO)]

(see Notes 5 and 6) (see Figure 29 through Figure 32)

PARAMETER

549-80

549-100

549-120

UNIT

MIN

MAX

td(DSL-HDV)

Delay time, DS low to HD driven

Case 1: Shared-access mode if

tw(DSH) < 7H

7H+20−tw(DSH)

td(HEL-HDV1)

Delay time, HDS falling to HD valid for first byte

†‡

Case 2: Shared-access mode if

tw(DSH) > 7H

td(HEL-HDV1)

Delay time, HDS falling to HD valid for first byte

of a non-subsequent read:

→ max 20 ns†‡

Case 3: Host-only mode if

tw(DSH) < 20 ns

40−tw(DSH)

Case 4: Host-only mode if

tw(DSH) > 20 ns

td(DSL-HDV2)

Delay time, DS low to HD valid, second byte

5‡

td(DSH-HYH)

Delay time, DS high to HRDY high

10H+10

tsu(HDV-HYH)

Setup time, HD valid before HRDY rising edge

3H−10

th(DSH-HDV)R

Hold time, HD valid after DS rising edge, read

td(COH-HYH)

Delay time, CLKOUT rising edge to HRDY high

td(DSH-HYL)

Delay time, HDS or HCS high to HRDY low

td(COH-HTX)

Delay time, CLKOUT rising edge to HINT change

† Host-only mode timings apply for read accesses to HPIC or HPIA, write accesses to BOB, and resetting DSPINT or HINT to 0 in shared-access

mode. HRDY does not go low for these accesses.

‡ Shared-access mode timings will be met automatically if HRDY is used.

NOTES:

5. SAM = shared-access mode, HOM = host-only mode

HAD stands for HCNTRL0, HCNTRL1, and HR / W.

HDS refers to either HDS1 or HDS2.

DS refers to the logical OR of HCS and HDS.

6. On host read accesses to the HPI, the setup time of HD before DS rising edge depends on the host waveforms and cannot be

specified here.

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