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READING FROM THE SN75DP129, AN EXAMPLE

SN75DP129

SLAS583A – JANUARY 2008 – REVISED MARCH 2008

the start sequence, followed by the slave address of the SN75DP129 and logic address of 00h. The SN75DP129

acknowledges it’s presence to the master and begins to transmit the memory registers contents . After each byte

is transferred, the SN75DP129 waits for an acknowledge (ACK) or a not-acknowledge (NACK) from the master.

If an ACK is received, the next byte of data is transmitted. If a NACK is received, the data transmission sequence

is expected to end and the master should send the stop command.

The SN75DP129 continues to send data until the master fails to acknowledge each byte transmission. If an ACK

is received after the transmission of byte 0x0F, the SN75DP129 transmits byte 0x10 and continues to transmit

byte 0x10 for all further ACK’s until a NACK is received.

SN75DP129 Read Phase

0

S

(1)

The SN75DP129 also supports an accelerated read mode in which steps 1 through 6 can be skipped.

Step 2

7

6

5

4

3

2

1

0

1

0

0

0

0

0

0

0

Step 3

9

A

Step 4

7

6

5

4

3

2

1

0

1

0

0

0

0

0

0

0

Step 5

9

A

Step 6

0

P

Step 7

0

S

Step 8

7

6

5

4

3

2

1

0

1

0

0

0

0

0

0

1

Step 9

9

A

Step 10

7

6

5

4

3

2

1

0

Data

Data

Data

Data

Data

Data

Data

Data

Where Data is determined by the Logic values Contained in the Sink Port Register

Step 11

9

X

Where X is an A (Acknowledge) or A (Not-Acknowledge)

An A causes the pointer to increment and step 10 is repeated.

An A causes the slave to stop transmitting and proceeds to step 12.

Step 12

0

P

20

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