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MSP3400C bảng dữ liệu(PDF) 23 Page - Micronas

tên linh kiện MSP3400C
Giải thích chi tiết về linh kiện  Multistandard Sound Processor
PDF  73 Pages
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nhà sản xuất  MICRONAS [Micronas]
Trang chủ  http://www.micronas.com
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MSP3400C bảng dữ liệu(HTML) 23 Page - Micronas

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MSP 3400C
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
23
6.2.2. Control Register ‘MODE_REG’
The register ‘MODE_REG’ contains the control bits de-
termining the operation mode of the MSP 3400C; Table
6–7 explains all bit positions.
Table 6–7: Control word ‘MODE_REG’: All bits are “0” after power-on-reset
Bit
Function
Comment
Definition
Recom-
mendation
[0]
DMA_SYNC1)
Synchronization to DMA
0 : off
1 : on
X
[1]
DCTR_TRI
Digital control out 0/1 tristate
0 : active
1 : tristate
0
[2]
I2S_TRI
I2S outputs tristate (I2S_CL,
I2S_WS, I2S_DA_OUT)
0 : active
1 : tristate
0
[3]
I2S Mode1)
Master/Slave mode of the
I2S bus
0 : Master
1 : Slave
X
[4]
I2S_WS Mode
WS due to the Sony or
Philips-Format
0 : Sony
1 : Philips
X
[5]
Audio_CL_OUT
switch Audio_Clock_Output
to tristate
0 : on
1 : tristate
X
[6]
not used
must be 0
0
[7]
FM1 FM2
MSPC-channel 1 mode
s.Table 6–8
[8]
AM
MSPC-channel 1/2 mode
0 : FM
1 : AM
s.Table 6–8
[9]
HDEV
High Deviation Mode
(channel matrix must be
sound A )
0 : normal mode
1 : high deviation mode
s.Table 6–8
[10]
not used
must be 1
1
[11]
S-Bus Mode2)
mode of Pins S_CL and S_ID
0 : Tristate
1 : Active
0
[12]
FM2 FIR Filter Gain
(FM2 = Ch1)
see table 6–10
0 : Gain = 6 dB
1 : Gain = 0 dB
0
[13]
FM2 FIR Filter Coeff. Set
(FM2 = Ch1)
see table 6–10
0 : use FIR_REG_1
1 : use FIR_REG_2
0
[14]
ADR
Mode of ADR Interface
0 : normal mode
1 : ADR mode
X
[15]
AM-Gain
additional gain in AM-mode
0 : 0 dB
1 : +12 dB
0
1) In case of synchronization to DMA, no I2S-slave mode possible.
In case of I2S-slave mode, no synchronization to DMA allowed. I2S-Slave mode dominates.
2) The normal operation mode is ‘Tristate’; SBUS is only used in conjunction with DMA.
X: Depend-
ing on mode



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