M28W640HCT datasheet(15/72 Pages) NUMONYX

15 / 72 page

M28W640HCT, M28W640HCB

Bus operations

15/72

to high impedance, independently from the Output Enable or Write Enable inputs. If Chip

Enable switches to VIH during a program or erase operation, the device enters Standby

mode when finished.

3.5

Automatic Standby

Automatic standby provides a low power consumption state during Read mode. Following a

read operation, the device enters automatic standby after 150 ns of bus inactivity even if

Chip Enable is Low, VIL, and the supply current is reduced to IDD1. The data inputs/outputs

will still output data if a bus read operation is in progress.

3.6

Reset

During Reset mode when Output Enable is Low, VIL, the memory is deselected and the

outputs are high impedance. The memory is in Reset mode when Reset is at VIL. The power

consumption is reduced to the standby level, independently from the Chip Enable, Output

Enable or Write Enable inputs. If Reset is pulled to VSS during a program or erase, this

operation is aborted and the memory content is no longer valid.

Table 2.

Bus operations(1)

X = VIL or VIH, VPPH = 12 V ± 5%.

Operation

VPP

DQ0-DQ15

Bus Read

VIL

VIH

Don't care

Data output

Bus Write

VIL

VIH

VIL

VIH

XVDD or VPPH

Data input

Output Disable

VIL

VIH

Don't care

Hi-Z

Standby

VIH

Don't care

Hi-Z

Reset

VIL

Don't care

Hi-Z

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