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PAC1721 bảng dữ liệu(PDF) 72 Page - Microchip Technology |
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PAC1721 bảng dữ liệu(HTML) 72 Page - Microchip Technology |
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72 / 92 page ![]() PAC1721 DS-20007088A-page 72 2026 Microchip Technology Inc. and its subsidiaries REGISTER 6-29: OC_LIMIT (ADDRESS 1CH) REGISTER 6-30: UC_LIMIT (ADDRESS 1DH) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 OC_LIMIT[7:0] bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as 0 -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared X = Bit is unknown bit 7:0 OC_LIMIT[7:0]: Configure the overcurrent (OC) limit as a 2’s complement number for all current modes (unipolar or bipolar). Note: Disable alerts in the ALERT_ENABLE register before making changes to the OC_LIMIT register to avoid false triggers. R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 UC_LIMIT[7:0] bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as 0 -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared X = Bit is unknown bit 7:0 UC_LIMIT[7:0]: Configure the undercurrent (UC) limit as a 2’s complement number for all current modes (unipolar or bipolar). Note: Disable alerts in the ALERT_ENABLE register before making changes to the UC_LIMIT register to avoid false triggers. |
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