PAC1721 datasheet(38/92 Pages) MICROCHIP

38 / 92 page

PAC1721

DS-20007088A-page 38

 2026 Microchip Technology Inc. and its subsidiaries

6.3

Detailed Register Information

REFRESH (ADDRESS 00H)

FIGURE 6-1:

Host Read Period After a Refresh Command.

SEND

No data in this command, Send Byte only

bit 7

bit 0

Legend:

R = Read bit

W = Writable bit

U = Unimplemented bit, read as 0

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

X = Bit is unknown

bit 7:0

SEND[7:0]: This command is a Send Byte and does not contain any data.

When PAC1721 receives the command, it executes a Refresh. The accumulator results, accumulator

count, VBUS and VSENSE measurements update and the accumulators reset.

When a Refresh command is issued, data registers become readable after the current conversion cycle

completes. The conversion period varies depending on the selected sample rate. Set the ALERT_CC

bit in the ALERT_ENABLE register if the fastest timing is required.

The host can read the accumulator results, accumulator count, VBUS and VSENSE data any time before

the next Refresh command is issued (see Figure 6-1).

Update the accumulator results, accumulator count, VBUS and VSENSE data without resetting the

accumulators using a Refresh_V command. See Section 4.2.2, Refresh Command.

Next Refresh Command is issued

Refresh Command was issued

Host can read data any time during this interval:

Accumulator results

Accumulator count

VBUS measurements

VSENSE measurements

Conversion Complete Alert triggers;

Data ready to read

ALERT

5 μs

Data not ready

to read

Conversion Cycle

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