PL133-37

Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 02/24/15 Page 4

NOISE CHARACTERISTICS

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX UNIT

Additive Phase Jitter

VDD=3.3V, Frequency=26MHz

Offset=12kHz ~ 5MHz

70

fs

VDD=3.3V, Frequency=100MHz

Offset=12kHz ~ 20MHz

80

fs

PL133-37 Additive Phase Jitter:

VDD=3.3V, CLK=26MHz, Integration Range 12KHz to 5MHz: 0.072ps typical.

-170

-160

-150

-140

-130

-120

-110

-100

-90

-80

-70

10

100

1000

10000

100000

1000000

10000000

Offset Frequency (Hz)

REF Input

PL133-37 Output

When a buffer is used to pass a signal then the buffer will add a little bit of its own noise. The phase noise on the

output of the buffer will be a little bit more than the phase noise in the input signal. To quantify the noise addition

in the buffer we compare the Phase Jitter numbers from the input and the output. The difference is called "Addi-

tive Phase Jitter". The formula for the Additive Phase Jitter is as follows:

Additive Phase Jitter = (Output Phase Jitter) - (Input Phase Jitter)

2

2