BD9DA00MF datasheet(22/53 Pages) ROHM

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BD9DA00MF

Datasheet

TSZ02201-0J2J0AB01940-1-2

18.Mar.2025 Rev.001

www.rohm.com

TSZ22111 • 15 • 001

1. Basic Operation – continued

(4) Power Good

The power good function monitors the FB pin voltage (VFB). It is recommended to connect the PGD pin to the VCC pin

or a power supply of 5.5 V or less with a resistor of 1 kΩ to 100 kΩ. If the power good function is not used, this pin can

be left floating or connected to the ground.

When VFB becomes 92.5 % or more of the FB reference voltage VREF 0.6 V (Typ) and keep the state for 0.9 ms (Typ),

the open drain Nch MOSFET connected to the PGD pin is turned off and the PGD output goes Hi-Z (high impedance).

When VFB falls below 80 % of VREF 0.6 V (Typ), the open drain Nch MOSFET is turned on and the PGD pin is pulled

down with 15 Ω (Typ).

The power good function also operates when the output overvoltage is detected. When VFB reaches 116 % (Typ) or

more of VREF 0.6 V (Typ), the open drain Nch MOSFET is latched in the ON state. The latched PGD output returns to

Hi-Z and is pulled up after EN is toggled, or VIN UVLO or VCC UVLO is reset.

In the shutdown state (VEN ≤ 0.7 V (Typ)) or VCC active state (0.8 V (Typ) ≤ VEN ≤ 1.22 V (Typ) and VIN < 2.0 V (Typ)),

the PGD pin is clamped by the internal circuit. It is clamped to 600 mV (Typ) during pulled up to 3.3 V with 100 kΩ, and

clamped to 700 mV (Typ) during pulled up to 3.3 V with 10 kΩ.

Table 1. PGD Output

State

Condition

PGD Output

Shutdown

VEN ≤ 0.7 V (Typ)

Clamp

VCC Active

0.8 V (Typ) ≤ VEN ≤ 1.22 V (Typ)

VIN < 2.0 V (Typ)

Clamp

VIN ≥ 2.0 V (Typ)

Low (15 Ω Pull-down)

Enable

VEN ≥ 1.22 V (Typ)

VFB / VREF ≥ 92.5 % (Typ) for 0.9 ms (Typ)

High (3 MΩ Pull-down)

Until PGD turns High

Low (15 Ω Pull-down)

OVP

Detect VFB / VREF ≥ 116 % (Typ)

Low (15 Ω Pull-down)

SCP

Detect VFB / VREF ≤ 80 % (Typ)

Low (15 Ω Pull-down)

UVLO

VIN ≤ 1.85 V (Typ) or VCC ≤ 2.5 V (Typ)

Low (15 Ω Pull-down)

TSD

Tj ≥ 175 °C (Typ)

Low (15 Ω Pull-down)

(5) Output Voltage Tracking Function

BD9DA00MF can be applied a reference voltage from an external power supply using the SS/REF pin. After the

SS/REF pin voltage starts up to 0.6 V, it can be set in the range of 0.6 V to 1.4 V.

(6) Output Voltage Clamp Function (OVC)

When the FB pin voltage VFB becomes VREF x 104 % (Typ) or more, the Low-Side FET turns on and suppresses the

output voltage rise. When VFB becomes VREF x 103 % (Typ) or less, it returns to normal operation. In the case of LLM

setting, the device returns to the normal operating state after 15 times switching operation with CCM. The output voltage

clamp function is enabled after the SS/REF pin voltage reaches 0.6 V (Typ).

(7) QuiCurTM

QuiCurTM is a combination of technologies that provides fast load response. This technology reduces the amount of

output voltage change in response to transient changes in load current. It also reduces the capacitance of output

capacitors required for power supply ICs, thereby reducing the number of components and the board mounting area.

(8) Nano Pulse ControlTM

Nano Pulse ControlTM is an original technology developed by ROHM Co., Ltd. It enables to control voltage stably, which

is difficult in the conventional technology, even in a narrow SW ON time such as less than 50 ns at typical condition.

(9) Bootstrap Capacitor Charge Function

The Low-Side FET turns on and charges to a bootstrap capacitor when the voltage between SW and BST (ΔVBST-SW)

becomes 2.1 V (Typ) or less.

(10) Output Discharge Function

When the device shuts down from the operating state by enable control, the internal discharge resistor RON_DIS = 70 Ω

(Typ) connected to the SW pin turns ON and discharges the output voltage VOUT to 10 % (Typ) of the setting voltage.

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