Data Sheet

ADGM3121

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 11 of 33

Figure 6. ADGM3121 Pin Configuration

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VDD

Positive Power Supply Input. For the recommended input voltage see Table 1. Place a 0.1μF decoupling capacitor to GND

as close to this pin as possible. The decoupling capacitor should be rated to at least 16V DC.

2, 4, 6, 7, 8, 10, 12, 13,

14, 16, 18

GND

Ground Return.

3

RF1B

RF1B Port. This pin can be an input or an output. If the pin is unused, it is recommended to either terminate it with a

50Ω resistor to GND (to prevent resonances in high-speed and RF applications) or tie it directly to GND (for DC-only

applications).

5

RF2B

RF2B Port. This pin can be an input or an output. If the pin is unused, it is recommended to either terminate it with a

50Ω resistor to GND (to prevent resonances in high-speed and RF applications) or tie it directly to GND (for DC-only

applications).

9

RFCB

Common RFCB Port. This pin can be an input or an output. If the pin is unused, it is recommended to either terminate it

with a 50Ω resistor to GND (to prevent resonances in high-speed and RF applications) or tie it directly to GND (for DC-only

applications).

11

RFCA

Common RFCA Port. This pin can be an input or an output. If the pin is unused, it is recommended to either terminate it

with a 50Ω resistor to GND (to prevent resonances in high-speed and RF applications) or tie it directly to GND (for DC-only

applications).

15

RF2A

RF2A Port. This pin can be an input or an output. If the pin is unused, it is recommended to either terminate it with a

50Ω resistor to GND (to prevent resonances in high-speed and RF applications) or tie it directly to GND (for DC-only

applications).

17

RF1A

RF1A Port. This pin can be an input or an output. If the pin is unused, it is recommended to either terminate it with a

50Ω resistor to GND (to prevent resonances in high-speed and RF applications) or tie it directly to GND (for DC-only

applications).

19

PIN/SPI

Parallel Mode Enable/SPI Mode Enable. The SPI interface is enabled when this pin is high, and the parallel interface (IN1,

IN2, IN3, IN4) is enabled when this pin is low.

20

IN1/SDO

Parallel Logic Digital Control Input 1. The voltage applied to this pin controls the gate of the RF1A to RFCA MEMS switch.

In SPI mode, this pin is the serial data output (SDO) pin.

21

IN2/SCLK

Parallel Logic Digital Control Input 2. The voltage applied to this pin controls the gate of the RF2A to RFCA MEMS switch.

In SPI mode, this pin is the serial clock (SCLK) pin that synchronizes the target device(s) to the controller device.

22

IN3/CS

Parallel Logic Digital Control Input 3. The voltage applied to this pin controls the gate of the RF2B to RFCB MEMS switch.

In SPI mode, this pin is the chip select (CS) pin. CS is an active low signal that selects the target device with which the

controller device intends to communicate.

23

IN4/SDI

Parallel Logic Digital Control Input 4. The voltage applied to this pin controls the gate of the RF1B to RFCB MEMS switch.

In SPI mode, this pin is the serial data input (SDI) pin.

24

VCP

Driver IC Input/Output. In normal operating mode this pin outputs 80V DC. Place a 0.1nF decoupling capacitor to GND as

close to this pin as possible. The decoupling capacitor should be rated to at least 100V DC.

EP

Exposed Pad. EP is internally connected to GND. Connect this pad to GND.