ADGM3121BCCZ-R2 datasheet(8/33 Pages) AD

tên linh kiện	ADGM3121BCCZ-R2

Giải thích chi tiết về linh kiện	3mm × 3mm DPDT MEMS Switch, 0Hz/DC to 24GHz

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Data Sheet

ADGM3121

SPECIFICATIONS

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Rev. 0 | 8 of 33

TIMING CHARACTERISTICS

VDD = 3.0V to 3.6V, GND = 0V and all specifications TMIN to TMAX, unless otherwise noted.

Table 2. Timing Characteristics

Parameter

Limit at TMIN

Limit at TMAX

Unit

Conditions

100

SCLK period

SCLK high pulse width

SCLK low pulse width

CS falling edge to SCLK active edge

Data setup time

Data hold time

SCLK active edge to CS rising edge

CS falling edge to SDO data available

t91

SCLK falling edge to SDO data available

t10

CS rising edge to SDO data available

t11

100

CS high time between SPI commands

t12

SCLK edge rejection to CS falling edge

t13

CS rising edge to SCLK edge rejection

1 Measured with a 20pF load. t9 determines the maximum SCLK frequency when SDO is used.

Timing Diagrams

Figure 2. Addressable Mode Timing

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