S29GL01GS datasheet(20/118 Pages) INFINEON

tên linh kiện	S29GL01GS

Giải thích chi tiết về linh kiện	128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash

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Datasheet

001-98285 Rev. *T

2023-07-17

128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash

Parallel, 3.0 V

Read operations

4.1

Asynchronous read

Each read access may be made to any location in the memory (random access). Each random access is self-timed

with the same latency from CE# or address to valid data (tACC or tCE).

4.2

Page mode read

Each random read accesses an entire 32-byte page in parallel. Subsequent reads within the same page have

faster read access speed. The page is selected by the higher address bits (A

MAX–A4), while the specific word of that

page is selected by the least significant address bits A3–A0. The higher address bits are kept constant and only

A3–A0 changed to select a different word in the same page. This is an asynchronous access with data appearing

on DQ15–DQ0 when CE# remains LOW, OE# remains LOW, and the asynchronous page access time (tPACC) is

satisfied. If CE# goes HIGH and returns LOW for a subsequent access, a random read access is performed and time

is required (tACC or tCE).

S29GL01GS bảng dữ liệu(PDF) 20 Page - Infineon Technologies AG