Basically, the application circuit topology is fixed, and the design procedure concerns only the selection

of the component values suitable for the voltage and current requirements of the specific application.

The design data one needs to know are therefore:

tion is expected to operate;

Maximum load current for each of the three sections:

Maximum peak-to-peak ripple amplitude of the output voltage for each switching section:

It is worth doing some preliminary considerations. The selection of the switching frequency depends on

the requirements of the application. If the aim is to minimize the size of the external components, 300

kHz will be chosen. For low input voltage applications 200 kHz is preferred, since it leads to a higher

maximum duty cycle.

As for the switching regulators, the inductance value of the output filter affects the inductor current ripple:

the higher the inductance the lower the ripple. This implies a lower current sense resistor value (for a

other hand, more copper losses and a worse transient behaviour due to load changes. Usually the maxi-

load current. It is convenient to introduce a ripple factor coefficient, RF, that is therefore a number be-

tween 0.15 and 0.5.

winding should be dimensioned to get this voltage with a certain margin (say, 14V). Conversely, an

higher input voltage leads to higher losses inside the regulator, to the detriment of efficiency, and to

higher total current on the +3.3V inductor. Besides it implies a higher turns ratio and therefore a worse

magnetic coupling, which affect energy transfer during flyback.

SWITCHING REGULATORS

+5.1V Inductor

To define the inductor, it is necessary to determine firstly the inductance value. Its minimum value is

given by:

=

5.1

Core geometry selection is connected to the requirements of the specific application in terms of space

utilization and other practical issues like ease of mounting, availability and so on. As to the material, the

choice should be directed towards ferrite, molypermalloy or Kool M

materials provide low core losses (ferrite in particular), so that the design can be concentrated on pre-

venting saturation and limiting copper losses.

Saturation must be avoided even at maximum peak current:

+

5.1

2

Ω).

AC losses can usually be neglected. A practical criterion to minimize DC resistance could be to use the

largest wire that fits the selected core.

Anyway the best solution, whenever possible, is to use an off-the-shelf inductor which meets the require-

ments in terms of inductance and maximum DC current. Nowadays there is a broad range of products

DESIGN PROCEDURE

L4992

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