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LPC3240 bảng dữ liệu(PDF) 32 Page - NXP Semiconductors

tên linh kiện LPC3240
Giải thích chi tiết về linh kiện  16/32-bit ARM microcontrollers; hardware floating-point coprocessor, USB On-The-Go, and EMC memory interface
PDF  80 Pages
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nhà sản xuất  NXP [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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LPC3240 bảng dữ liệu(HTML) 32 Page - NXP Semiconductors

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LPC3220_30_40_50
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2.1 — 24 June 2014
32 of 80
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
condition is indicated via status registers. An interrupt is also generated if enabled. The
DMA controller when enabled transfers data between the endpoint buffer and the USB
RAM.
Features
• Fully compliant with USB 2.0 full-speed specification.
• Supports 32 physical (16 logical) endpoints.
• Supports control, bulk, interrupt and isochronous endpoints.
• Scalable realization of endpoints at run time.
• Endpoint maximum packet size selection (up to USB maximum specification) by
software at run time.
• RAM message buffer size based on endpoint realization and maximum packet size.
• Supports bus-powered capability with low suspend current.
• Supports DMA transfer on all non-control endpoints.
• One duplex DMA channel serves all endpoints.
• Allows dynamic switching between CPU controlled and DMA modes.
• Double buffer implementation for bulk and isochronous endpoints.
7.6.3.2
USB host controller
The host controller enables data exchange with various USB devices attached to the bus.
It consists of register interface, serial interface engine and DMA controller. The register
interface complies to the OHCI specification.
Features
• OHCI compliant.
• OHCI specifies the operation and interface of the USB host controller and software
driver.
• The host controller has four USB states visible to the software driver:
– USBOperational: Process lists and generate SOF tokens.
– USBReset: Forces reset signaling on the bus, SOF disabled.
– USBSuspend: Monitor USB for wake-up activity.
– USBResume: Forces resume signaling on the bus.
• HCCA register points to interrupt and isochronous descriptors list.
• ControlHeadED and BulkHeadED registers point to control and bulk descriptors list.
7.6.3.3
USB OTG controller
USB OTG (On-The-Go) is a supplement to the USB 2.0 specification that augments the
capability of existing mobile devices and USB peripherals by adding host functionality for
connection to USB peripherals.
Features
• Fully compliant with On-The-Go supplement to the USB Specification 2.0 Revision
1.0.



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