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MP5026GLRT bảng dữ liệu(PDF) 5 Page - Monolithic Power Systems |
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MP5026GLRT bảng dữ liệu(HTML) 5 Page - Monolithic Power Systems |
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5 / 24 page ![]() MP5026 – 16V, 20A, 2.8mΩ RDS(ON), HOT-SWAP INTELLI-FUSE SOLUTION MP5026 Rev. 1.0 MonolithicPower.com 5 7/5/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (1) VIN (DC).........................................-0.3V to +20V VIN (1μs) ....................................................... 24V VIN (25ns) ..................................................... 29V VOUT...............................................-0.3V to +20V VOUT (200ns) .............................................. -1.5V All other pins ................................-0.3V to +4.2V Continuous power dissipation (TA = 25°C) (2) ................................................................. 4.09W Junction temperature (TJ) .........................150°C Lead temperature .....................................260°C Storage temperature ................ -65°C to +155°C ESD Ratings (3) Human body model (HBM)...................Class 1C Charged-device model (CDM)...........Class C2B Recommended Operating Conditions (4) Input voltage (VIN) ............................2.7V to 16V Operating junction temp (TJ) .... -40°C to +125°C Thermal Resistance (5) θJA θJC TLGA-26 (4mmx4mm) .......... 30.5 ....26.3 . °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ (MAX), the junction-to- ambient thermal resistance, θ JA, and the ambient temperature, TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation can produce an excessive die temperature, which may cause the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Followed ANSI/ESDA/JEDEC JS-001 for HBM and ANSI/ESDA/JEDEC JS-002 for CDM. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on a JESD51-7, 4-layer PCB. |
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