CC115LRGPR datasheet(21/74 Pages) TI2

21 / 74 page

CC115L

www.ti.com

SWRS105B – MAY 2011 – REVISED JUNE 2014

5.6

Microcontroller Interface and Pin Configuration

In a typical system, CC115L will interface to a microcontroller. This microcontroller must be able to:

•

Program CC115L into different modes

•

Write buffered data

•

Read back status information through the 4-wire SPI-bus configuration interface (SI, SO, SCLK, and

CSn)

5.6.1

Configuration Interface

The microcontroller uses four I/O pins for the SPI configuration interface (SI, SO, SCLK, and CSn). The

SPI is described in Section 5.5.

5.6.2

General Control and Status Pins

The CC115L has two dedicated configurable pins (GDO0 and GDO2) and one shared pin (GDO1) that

can output internal status information useful for control software. These pins can be used to generate

interrupts on the MCU. See Section 5.16 for more details on the signals that can be programmed.

GDO1 is shared with the SO pin in the SPI interface. The default setting for GDO1/SO is 3-state output.

By selecting any other of the programming options, the GDO1/SO pin will become a generic pin. When

CSn is low, the pin will always function as a normal SO pin.

In the synchronous and asynchronous serial modes, the GDO0 pin is used as a serial TX data input pin

while in transmit mode.

Detailed Description

Submit Documentation Feedback

Product Folder Links: CC115L

CC115LRGPR bảng dữ liệu(PDF) 21 Page - Texas Instruments