Vhys

VIT+

VIT-

VCC

VIH

VIL

0 V

Logic high

Logic low

15 k

Ω

15 k

Ω

1.5 k

Ω

22

Ω

22

Ω

8

TUSB2046B, TUSB2046I

SLLS413L – FEBRUARY 2000 – REVISED JUNE 2017

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Product Folder Links: TUSB2046B TUSB2046I

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Copyright © 2000–2017, Texas Instruments Incorporated

(1)

Characterized only. Limits are approved by design and are not production tested.

7.7 Differential Driver Switching Characteristics (Low Speed Mode)

over recommended ranges of operating free-air temperature and supply voltage, CL = 50 pF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

tr

Transition rise time for DP or DM(1)

CL = 200 pF to 600 pF,

See Figure 1 and Figure 2

75

300

ns

tf

Transition fall time for DP or DM(1)

CL = 200 pF to 600 pF,

See Figure 1 and Figure 2

75

300

ns

t(RFM)

Rise/fall time matching(1)

(tr/tf) × 100

80%

120%

VO(CRS) Signal crossover output voltage

(1)

CL = 200 pF to 600 pF

1.3

2.0

V

Figure 1. Differential Driver Switching Load

Figure 2. Differential Driver Timing Waveforms

Figure 3. Single-Ended Receiver Input Signal Parameter Definitions