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TUSB2046B, TUSB2046I

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SLLS413L – FEBRUARY 2000 – REVISED JUNE 2017

Product Folder Links: TUSB2046B TUSB2046I

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Copyright © 2000–2017, Texas Instruments Incorporated

Pin Functions (continued)

PIN

I/O

DESCRIPTION

NAME

NO.

OVRCUR1

10

I

Overcurrent input. OVRCUR1–OVRCUR4 are active low. For per-port overcurrent detection, one

overcurrent input is available for each of the four downstream ports. In the ganged mode, any

OVRCUR input may be used and all OVRCUR terminals must be tied together. OVRCUR

terminals are active low inputs with noise filtering logic.

OVRCUR2

14

OVRCUR3

18

OVRCUR4

22

PWRON1

9

O

Power-on/-off control signals. PWRON1–PWRON4 are active low, push-pull outputs. Push-pull

outputs eliminate the pullup resistors which open-drain outputs require. However, the external

power switches that connect to these terminals must be able to operate with 3.3-V inputs because

these outputs cannot drive 5-V signals.

PWRON2

13

PWRON3

17

PWRON4

21

RESET

4

I

RESET is an active low TTL input with hysteresis and must be asserted at power up. When

RESET is asserted, all logic is initialized. Generally, a reset with a pulse width between 100 μs

and 1 ms is recommended after 3.3-V VCC reaches its 90%. Clock signal has to be active during

the last 60 μs of the reset window.

SUSPND

32

O

Suspend status. SUSPND is an active high output available for external logic power-down

operations. During the suspend mode, SUSPND is high. SUSPND is low for normal operation.

TSTMODE

31

I

Test/mode terminal. TSTMODE is used as a test terminal during production testing. This terminal

must be tied to ground or 3.3-V VCC for normal 6-MHz or 48-MHz operation, respectively.

TSTPLL/

48MCLK

27

I/O

Test/48-MHz clock input. TSTPLL/48MCLK is used as a test terminal during production testing.

This terminal must be tied to ground for normal 6-MHz operation. If 48-MHz input clock is desired,

a 48-MHz clock source (no crystal) can be connected to this input terminal.

VCC

3, 25

3.3-V supply voltage

XTAL1

30

I

Crystal 1. XTAL1 is a 6-MHz crystal input with 50% duty cycle. An internal PLL generates the 48-

MHz and 12-MHz clocks used internally by the ASIC logic.

XTAL2

29

O

Crystal 2. XTAL2 is a 6-MHz crystal output. This terminal must be left open when using an

oscillator.