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TPS72011DRVT bảng dữ liệu(PDF) 3 Page - Texas Instruments

tên linh kiện TPS72011DRVT
Giải thích chi tiết về linh kiện  TPS720 350 mA, Ultra-Low VIN, RF Low-Dropout Linear Regulator With Bias Pin
PDF  39 Pages
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nhà sản xuất  TI2 [Texas Instruments]
Trang chủ  https://www.ti.com
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TPS72011DRVT bảng dữ liệu(HTML) 3 Page - Texas Instruments

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BIAS
IN
EN
GND
OUT
C3
B2
A3
C1
A1
IN
GND
BIAS
6
5
4
OUT
NC
EN
1
2
3
Thermal
Pad
(1)
3
TPS720
www.ti.com
SBVS100E – JUNE 2008 – REVISED SEPTEMBER 2015
Product Folder Links: TPS720
Submit Documentation Feedback
Copyright © 2008–2015, Texas Instruments Incorporated
5 Pin Configuration and Functions
DRV Package
6-Pin SON With Exposed Thermal Pad
Top View
(1)
TI recommends connecting the SON (DRV)
package thermal pad to ground.
YZU Package
5-Pin DSBGA
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
DRV
YZU
OUT
1
A3
O
Output pin. A 2.2-μF ceramic capacitor is connected from this pin to ground, for stability and to provide
load transients. See Input and Output Capacitor Requirements.
NC
2
—
—
No connection.
EN
3
C3
I
Enable pin. A logic high signal on this pin turns the device on and regulates the voltage from IN to
OUT. A logic low on this pin turns off the device.
BIAS
4
C1
I
Bias supply pin. TI recommends bypassing this input with a ceramic capacitor to ground for better
transient performance. See Input and Output Capacitor Requirements.
GND
5
B2
—
Ground pin.
IN
6
A1
I
Input pin. This pin can be a maximum of 4.5 V; VIN must not exceed VBIAS. Bypass this input with a
ceramic capacitor to ground. See Input and Output Capacitor Requirements.
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
To ensure proper operation of the device it is necessary that VIN ≤ VBIAS under all conditions.
(3)
Whichever is less.
(4)
For durations no longer than 1ms each, for a total of no more than 1000 occurrences over the lifetime of the device.
6 Specifications
6.1 Absolute Maximum Ratings
At TJ = –40°C to 125°C (unless otherwise noted). All voltages are with respect to GND.
(1)
MIN
MAX
UNIT
VIN
(2)
Input voltage (steady-state)
–0.3
VBIAS or 5
(3)
V
VIN_PEAK
(4)
Peak transient input
5.5
V
VBIAS
Bias voltage
–0.3
6
V
VEN
Enable voltage
–0.3
6
V
VOUT
Output voltage
–0.3
5
V
IOUT
Peak output current
Internally limited
Output short circuit duration
Indefinite
PDISS
Total continuous power dissipation
See Thermal Information
TJ
Operating junction temperature
–55
125
°C
Tstg
Storage temperature
–55
150
°C



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