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MSP430F2002IPWR bảng dữ liệu(PDF) 48 Page - Texas Instruments |
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MSP430F2002IPWR bảng dữ liệu(HTML) 48 Page - Texas Instruments |
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48 / 102 page ![]() MSP430F20x3 MSP430F20x2 MSP430F20x1 SLAS491I – AUGUST 2005 – REVISED DECEMBER 2012 www.ti.com JTAG and Spy-Bi-Wire Interface over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER VCC MIN TYP MAX UNIT fSBW Spy-Bi-Wire input frequency 2.2 V, 3 V 0 20 MHz tSBW,Low Spy-Bi-Wire low clock pulse length 2.2 V, 3 V 0.025 15 µs tSBW,En Spy-Bi-Wire enable time (TEST high to acceptance of first clock edge(1)) 2.2 V, 3 V 1 µs tSBW,Ret Spy-Bi-Wire return to normal operation time 2.2 V, 3 V 15 100 µs 2.2 V 0 5 MHz fTCK TCK input frequency(2) 3 V 0 10 MHz RInternal Internal pulldown resistance on TEST 2.2 V, 3 V 25 60 90 k Ω (1) Tools accessing the Spy-Bi-Wire interface need to wait for the maximum tSBW,En time after pulling the TEST/SBWCLK pin high before applying the first SBWCLK clock edge. (2) fTCK may be restricted to meet the timing requirements of the module selected. JTAG Fuse (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT VCC(FB) Supply voltage during fuse-blow condition TA = 25°C 2.5 V VFB Voltage level on TEST for fuse blow 6 7 V IFB Supply current into TEST during fuse blow 100 mA tFB Time to blow fuse 1 ms (1) Once the fuse is blown, no further access to the JTAG/Test, Spy-Bi-Wire, and emulation feature is possible, and JTAG is switched to bypass mode. 48 Submit Documentation Feedback Copyright © 2005–2012, Texas Instruments Incorporated |
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