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MSP430F2002IPW bảng dữ liệu(PDF) 24 Page - Texas Instruments |
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MSP430F2002IPW bảng dữ liệu(HTML) 24 Page - Texas Instruments |
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24 / 102 page ![]() MSP430F20x3 MSP430F20x2 MSP430F20x1 SLAS491I – AUGUST 2005 – REVISED DECEMBER 2012 www.ti.com Schmitt-Trigger Inputs (Ports P1 and P2) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT 0.45 VCC 0.75 VCC VIT+ Positive-going input threshold voltage 2.2 V 1.00 1.65 V 3 V 1.35 2.25 0.25 VCC 0.55 VCC VIT- Negative-going input threshold voltage 2.2 V 0.55 1.20 V 3 V 0.75 1.65 2.2 V 0.2 1.0 Vhys Input voltage hysteresis (VIT+ - VIT-) V 3 V 0.3 1.0 For pullup: VIN = VSS, RPull Pullup/pulldown resistor 20 35 50 k Ω For pulldown: VIN = VCC CI Input capacitance VIN = VSS or VCC 5 pF Inputs (Ports P1 and P2) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT Port P1, P2: P1.x to P2.x, External trigger pulse t(int) External interrupt timing 2.2 V, 3 V 20 ns width to set interrupt flag(1) (1) An external signal sets the interrupt flag every time the minimum interrupt pulse width t(int) is met. It may be set even with trigger signals shorter than t(int). Leakage Current (Ports P1 and P2) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN MAX UNIT Ilkg(Px.y) High-impedance leakage current (1) (2) 2.2 V, 3 V ±50 nA (1) The leakage current is measured with VSS or VCC applied to the corresponding pins, unless otherwise noted. (2) The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup or pulldown resistor is disabled. 24 Submit Documentation Feedback Copyright © 2005–2012, Texas Instruments Incorporated |
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