LP5569 datasheet(16/93 Pages) TI2

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tJITTER

1/fPWM

D/fPWM

D is tJITTER x fPWM or equal to #/6%¶V = ¨' [ 2048 codes.

For 11-bit resolution, #LSBs is equal to a hysteresis setting of LN(#/6%¶V)/LN(2).

For example, with a tJITTER of 1 µs and a fPWM of 5 kHz, the hysteresis setting should be:

LN(1 µ s x 5 kHz x 2048)/LN(2) = 3.35 (4 LSBs).

tJITTER

LP5569

SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017

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Product Folder Links: LP5569

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Feature Description (continued)

8.3.1.2.3.3

PWM Master Fader Hysteresis

To prevent jitter on the input PWM signal from feeding through the PWM path and causing oscillations in the LED

current, the LP5569 device offers seven selectable hysteresis settings. The hysteresis works by forcing a specific

number of 11-bit LSB code transitions to occur in the input duty cycle before the LED current changes. Table 1

describes the hysteresis. The hysteresis only applies during a change in direction of brightness currents. Once

the change in direction has taken place, the PWM input must overcome the required LSB(s) of the hysteresis

setting before the brightness change takes effect. Once the initial hysteresis has been overcome and the

direction in brightness change remains the same, the PWM-to-current response changes with no hysteresis.

Table 1. PWM Input Hysteresis

HYSTERESIS

SETTING

(0x80 bits

[2:0])

MIN. CHANGE IN PWM PULSE

DURATION (Δt) REQUIRED TO

CHANGE LED CURRENT,

AFTER DIRECTION CHANGE

(for fPWM < 11.7 kHz)

MIN. CHANGE

IN PWM DUTY

CYCLE (ΔD)

REQUIRED TO

CHANGE LED

CURRENT

AFTER

DIRECTION

CHANGE

MIN (ΔILED), INCREASE FOR INITIAL CODE

EXPONENTIAL MODE

LINEAR MODE

000 (0 LSB)

1 / (fPWM × 2047)

0.05%

0.3%

0.05%

001 (1 LSB)

1 / (f PWM× 1023)

0.1%

0.61%

0.1%

010 (2 LSB)

1 / (fPWM × 511)

0.2%

1.21%

0.2%

011 (3 LSB)

1 / (fPWM × 255)

0.39%

2.4%

0.39%

100 (4 LSB)

1 / (fPWM × 127)

0.78%

4.74%

0.78%

101 (5 LSB)

1 / (fPWM × 63)

1.56%

9.26%

1.56%

110 (6 LSB)

1 / (fPWM × 31)

3.12%

17.66%

3.12%

Figure 17. PWM Hysteresis Example

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