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STPM01 bảng dữ liệu(PDF) 41 Page - STMicroelectronics |
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STPM01 bảng dữ liệu(HTML) 41 Page - STMicroelectronics |
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41 / 60 page ![]() STPM01 Theory of operation Doc ID 10853 Rev 8 41/60 division makes sense with the MSB of data value because the MSN of it holds the parity code rather than useful data. The sequence of data record during the reading operation is fixed. Normally, an application will read 1st,.., 6th data record, the 7th and 8th data record would read only when it need to fetch the configuration data. However, an application may apply a precharge command (see Table 17) prior reading phase. This command forces the device to respond with the sequence 5th,.., 8th, 1st,.., 4th. Such change of sequence can be used to skip the first four data records. The timing diagram of the reading operation is shown on the Figure 26. One can see the latching and beginning of shifting phase of the first byte (0x5F) of the first data record and end of reading. Also, both alternatives to reset the internal transmission serial clock counter is shown in signal SYN. Figure 25. Data records reconstruction Figure 26. Timing for data records reading t 1 t 2 t 3t4 t 5 t 6 t 7 t 8 SCLNLC SDATD SYN SCS 1st byte last bit of 32nd byte f(read) SCLNLC SDATD SYN SCS 1st byte last bit of 32nd byte f(read) |
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