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SPC560D30L3 bảng dữ liệu(PDF) 57 Page - STMicroelectronics

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DS6494 Rev 8
57/82
SPC560D30x, SPC560D40x
Electrical characteristics
77
impedance of the transducer or circuit supplying the analog signal to be measured. The filter
at the input pins must be designed taking into account the dynamic characteristics of the
input signal (bandwidth) and the equivalent input impedance of the ADC itself.
In fact a current sink contributor is represented by the charge sharing effects with the
sampling capacitance: being CS and Cp2 substantially two switched capacitances, with a
frequency equal to the conversion rate of the ADC, it can be seen as a resistive path to
ground. For instance, assuming a conversion rate of 1 MHz, with CS+Cp2 equal to 3 pF, a
resistance of 330 k
 is obtained (REQ = 1 / (fc ×(CS+Cp2)), where fc represents the
conversion rate at the considered channel). To minimize the error induced by the voltage
partitioning between this resistance (sampled voltage on CS+Cp2) and the sum of RS + RF,
the external circuit must be designed to respect the Equation 4:
Equation 4
Equation 4 generates a constraint for external network design, in particular on a resistive
path.
Figure 12. Input equivalent circuit (precise channels)
VA
RS RF
+
REQ
---------------------
1
2
---LSB
RF
CF
RS
RL
RSW1
CP2
CS
VDD
Sampling
Source
Filter
Current Limiter
EXTERNAL CIRCUIT
INTERNAL CIRCUIT SCHEME
CP1
RAD
Channel
Selection
VA
RS: Source impedance
RF: Filter resistance
CF: Filter capacitance
RL: Current limiter resistance
RSW1: Channel selection switch impedance
RAD: Sampling switch impedance
CP: Pin capacitance (two contributions, CP1 and CP2)
CS: Sampling capacitance



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