ISO1430DWR datasheet(11/49 Pages) TI2

11 / 49 page

7.11 Supply Current Characteristics: Side 1 (ICC1)

Bus loaded or unloaded (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DRIVER ENABLED, RECEIVER DISABLED

Logic-side supply

current

VD = VCC1, VCC1 = 5 V ± 10%

2.6

4.4

Logic-side supply

current

VD = VCC1, VCC1 = 3.3 V ± 10%

2.6

4.4

Logic-side supply

current

ISO141x, D = 500-kbps square wave with 50% duty cycle, VCC1 = 5 V ± 10%

3.2

5.1

Logic-side supply

current

ISO141x, D = 500-kbps square wave with 50% duty cycle, VCC1 = 3.3 V ± 10%

3.2

5.1

Logic-side supply

current

ISO143x, D = 12-Mbps square wave with 50% duty cycle, VCC1 = 5 V ± 10%

3.2

5.1

Logic-side supply

current

ISO143x, D = 12-Mbps square wave with 50% duty cycle, VCC1 = 3.3 V ± 10%

3.2

5.1

Logic-side supply

current

ISO145x, D = 50-Mbps square wave with 50% duty cycle, VCC1 = 5 V ± 10%

3.6

5.3

Logic-side supply

current

ISO145x, D = 50-Mbps square wave with 50% duty cycle, VCC1 = 3.3 V ± 10%

3.4

5.2

DRIVER ENABLED, RECEIVER ENABLED

Logic-side supply

current

VRE = VGND1, loopback if full-duplex device, VD = VCC1, VCC1 = 5 V ± 10%

2.6

4.4

Logic-side supply

current

VRE = VGND1, loopback if full-duplex device, VD = VCC1, VCC1 = 3.3 V ± 10%

2.6

4.4

Logic-side supply

current

ISO141x, VRE = VGND1, loopback if full-duplex device, D = 500-kbps square wave with 50% duty cycle,

VCC1 = 5 V ± 10%, CL(R) (1) = 15 pF

3.3

5.1

Logic-side supply

current

ISO141x, VRE = VGND1, loopback if full-duplex device, D = 500-kbps square wave with 50% duty cycle,

VCC1 = 3.3 V ± 10%, CL(R) (1) = 15 pF

3.2

5.1

Logic-side supply

current

ISO143x, VRE = VGND1, loopback if full-duplex device, D = 12-Mbps square wave with 50% duty cycle,

VCC1 = 5 V ± 10%, CL(R) (1) = 15 pF

4.1

Logic-side supply

current

ISO143x, VRE = VGND1, loopback if full-duplex device, D= 12-Mbps square wave with 50% duty cycle,

VCC1 = 3.3 V ± 10%, CL(R) (1) = 15 pF

3.8

5.7

Logic-side supply

current

ISO145x, VRE = VGND1, loopback if full-duplex device, D = 50-Mbps square wave with 50% duty cycle,

VCC1 = 5 V ± 10%, CL(R) (1) = 15 pF

6.3

8.9

Logic-side supply

current

ISO145x, VRE = VGND1, loopback if full-duplex device, D= 50-Mbps square wave with 50% duty cycle,

VCC1 = 3.3 V ± 10%, CL(R) (1) = 15 pF

5.3

7.8

DRIVER DISABLED, RECEIVER ENABLED

Logic-side supply

current

V(A-B) ≥ 200 mV, VD = VCC1, VCC1 = 5 V ± 10%

1.6

3.1

Logic-side supply

current

V(A-B) ≥ 200 mV, VD = VCC1, VCC1 = 3.3 V ± 10%

1.6

3.1

Logic-side supply

current

ISO141x, (A-B) = 500-kbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5 V ± 10%, CL(R) (1) =

15 pF

1.7

3.1

Logic-side supply

current

ISO141x, (A-B) = 500-kbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3 V ± 10%, CL(R) (1)

= 15 pF

1.6

3.1

Logic-side supply

current

ISO143x, (A-B) = 12-Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5 V ± 10%, CL(R) (1) =

15 pF

2.6

Logic-side supply

current

ISO143x, (A-B) = 12-Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3 V ± 10%, CL(R) (1)

= 15 pF

2.2

3.7

Logic-side supply

current

ISO145x, (A-B) = 50-Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5 V ± 10%, CL(R) (1) =

15 pF

4.7

6.7

Logic-side supply

current

ISO145x, (A-B) = 50-Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3 V ± 10%, CL(R) (1)

= 15 pF

3.7

5.7

DRIVER DISABLED, RECEIVER DISABLED

Logic-side supply

current

VDE = VGND1, VD = VCC1, VCC1 = 5 V ± 10%

1.6

3.1

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ISO1450, ISO1452, ISO1410, ISO1412, ISO1430, ISO1432

SLLSF22H – APRIL 2018 – REVISED JUNE 2024

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