CDCLVP1102

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SCAS884D – AUGUST 2009 – REVISED DECEMBER 2015

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VCC

Supply voltage range(2)

–0.5

4.6

V

VIN

Input voltage range (3)

–0.5

VCC + 0.5

V

VOUT

Output voltage range (3)

–0.5

VCC + 0.5

V

IIN

Input current

20

mA

IOUT

Output current

50

mA

TA

Specified free-air temperature (no airflow)

–40

85

°C

TJ

Maximum junction temperature

125

°C

Tstg

Storage temperature

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All supply voltages must be supplied simultaneously.

(3)

The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic

V(ESD)

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

discharge

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VCC

Supply voltage

2.375

2.50/3.30

3.60

V

TA

Ambient temperature

–40

85

°C

TPCB

PCB temperature (measured at thermal pad)

105

°C

6.4 Thermal Information

CDCLVP1102

THERMAL METRIC(1)(2)(3)

RGT (VQFN)

UNIT

16 PINS

0 LFM(4)

51.8

RθJA

Junction-to-ambient thermal resistance

150 LFM(4)

45

°C/W

400 LFM(4)

40.8

RθJC(to

Junction-to-case (top) thermal resistance

61.3

°C/W

p)

RθJB

(5)

Junction-to-board thermal resistance

21.7

°C/W

ψJT

Junction-to-top characterization parameter

1.5

°C/W

ψJB

Junction-to-board characterization parameter

21.7

°C/W

RθJC(b

Junction-to-case (bottom) thermal resistance

6.3

°C/W

ot)

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

(2)

The package thermal resistance is calculated in accordance with JESD 51 and JEDEC 2S2P (high-K board).

(3)

Connected to GND with four thermal vias (0.3-mm diameter).

(4)

2 x 2 vias on Pad

(5)

θJP (junction-to-pad) is used for the QFN package, because the primary heat flow is from the junction to the GND pad of the QFN

package.

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